In the fabrication of integrated circuits or semiconductor devices, the selective and often partial removal of semiconductor substrate material or the selective and partial removal of a subsequently deposited layer of semiconductor material is often necessary for various reasons. For example, the removal of at least a portion of material in specific areas may be necessary to make electrical contact to underlying components or to an underlying doped semiconductor region by another component or doped region that is to be subsequently deposited or formed on the substrate or on a previously deposited layer of semiconductor material. The precise location of the material to be removed and the quantity of the material, that is the surface area and depth of the material to be removed, are typically very critical to the fabrication process. The precision of these parameters and the accuracy of the removal of material is becoming even more critical as component densities are increasing and the demand for higher yields is also increasing. In contrast, packaging requirements are calling for smaller, more compact structures as consumers demand smaller, lighter weight and more portable electronic devices that have greater functionality.
A current method for determining location and depth for removal of material in the fabrication of semiconductor devices is to drill or etch probe holes into the substrate or semiconductor layer and then measure the depth of penetration with probes at intervals during the etching process. For example, probe holes are used to determine the average silicon thickness and approximate etch rate in a laser chemical etching (LCE) process or focused ion beam (FIB) process. This involves additional process steps in removing the workpiece or integrated circuit being fabricated from the LCE or FIB equipment, drilling or etching the probe holes, if they have not already been formed, and measuring the depth or thickness by inserting probes and measuring the insertion depth. Depending upon the measurement results, the semiconductor device is then painstakingly remounted or realigned with the LCE equipment for additional processing at hopefully, substantially the same exact location. Accordingly, this current method does not permit real time or in situ monitoring and control of the etching process and adds extensive time to the manufacturing process. Additionally, the process involves a certain amount of guess work or trial and error and there is at least some probability of over-etching and damaging the device or other components formed in the substrate. Further, as component densities increase and packaging size requirements shrink, there will be even more limited space to make probe holes.
Accordingly, for all the reasons discussed above, and for other reasons that will become apparent upon reading and understanding the present specification, there is a need for a method and apparatus for monitoring and controlling the removal of material from a semiconductor substrate or integrated circuit that permits real time or in situ monitoring and control of the removal of material and that provides accurate endpointing to discontinue removal of material to prevent damage to the integrated circuit or other components formed within the integrated circuit and to also permits accurate location of the area in which material is to be removed by mapping the location of semiconductor regions formed within the substrate or built up layers of the integrated circuit.